Metal-oxide-semiconductor field effect transistor (MOSFET) devices are used to switch the flow of current in a circuit between conducting and non-conducting states. The MOSFET devices include doped source and drain regions in a semiconductor with a gate oxide disposed over the semiconductor between the source and drain regions. The source regions are disposed within larger doped well regions with the source region being doped with an oppositely charged dopant than the well region. A gate contact is disposed over the gate oxide and separated from the semiconductor by the gate oxide. An electronic signal is applied to the gate contact to create a conductive path through the semiconductor from the source to the drain regions. When the signal is removed from the gate contact, the conductive path is no longer present and the semiconductor prevents current from flowing through the semiconductor.
The semiconductor of the MOSFET device may be associated with an on-resistance characteristic that represents the electrical resistance of the MOSFET device to switching from a non-conducting state to the conducting state. This on-resistance characteristic can be reduced in order to decrease power dissipation losses of the MOSFET device. However, decreasing the on-resistance characteristic may be accomplished by reducing the FET channel, connecting source to drain, which can lead to punch through breakdown. Additionally, punch through may result in an increase in the output conductance of the MOSFET device and a decrease in an upper limit on the operating voltage of the MOSFET device.
In order to reduce the potential for punch through to occur, the dopant concentration of the well regions in the semiconductor may be increased. However, such an increase in the dopant concentration can result in an increase in the voltage needed in the signal applied to the gate contact to switch the MOSFET device from the non-conducting state to the conducting state. During the non-conducting state, the gate will be biased below the threshold value required for channel conduction and is usually at the same potential as the source or below (e.g. a negative gate bias value for an N-channel FET). When the device is in its full blocking state, the depletion charge on the lightly doped side of the blocking junction creates an electric field which penetrates the separations in the blocking junction to the interface, and will terminate on the gate electrode. The ratio of dielectric constants between the semiconductor and the gate oxide will amplify the electric field strength component normal to the surface [e.g. Eox=(∈SiC /∈ox)*Esic], by the ratios of the relative permittivities. For the case of a SiC and silicon oxide interface, the normal field is enhanced by a factor 2.5 in the oxide. As the electric fields generated in the gate oxide increase, the reliability and/or useful life of the MOSFET device can decrease due to breakdown in the gate oxide material. Thus it is desirable to reduce the field strength in the gate oxide which covers the spaces between the blocking junctions, commensurate with proper FET operation in the conducting channel.